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adding make tutorial
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make.html.markdown
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---
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language: make
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contributors:
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- ["Robert Steed", "https://github.com/robochat"]
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filename: Makefile
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---
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A Makefile defines a graph of rules for creating a target (or targets).
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It's purpose is the do the minimum amount of work needed to update a
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target to the most recent version of the source. Famously written over a
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weekend by Stuart Feldman in 1976, it is still widely used (particularly
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on Unix) despite many competitors and criticisms.
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There are many varieties of make in existance, this article assumes that
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we are using GNU make which is the standard on Linux.
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```make
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# Comments can be written like this.
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# Files should be named Makefile and then be can run as `make <target>`.
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# Otherwise we use `make -f "filename" <target>`.
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# Warning - only use TABS to indent in Makefiles, never spaces!
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#-----------------------------------------------------------------------
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# Basics
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#-----------------------------------------------------------------------
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# A rule - this rule will only run if file0.txt doesn't exist.
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file0.txt:
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echo "foo" > file0.txt
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# Even comments in these 'recipe' sections get passed to the shell.
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# Try `make file0.txt` or simply `make` - first rule is the default.
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# This rule will only run if file0.txt is newer than file1.txt.
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file1.txt: file0.txt
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cat file0.txt > file1.txt
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# use the same quoting rules as in the shell.
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@cat file0.txt >> file1.txt
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# @ stops the command from being echoed to stdout.
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-@echo 'hello'
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# - means that make will keep going in the case of an error.
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# Try `make file1.txt` on the commandline.
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# A rule can have multiple targets and multiple prerequisites
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file2.txt file3.txt: file0.txt file1.txt
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touch file2.txt
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touch file3.txt
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# Make will complain about multiple recipes for the same rule. Empty
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# recipes don't count though and can be used to add new dependencies.
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#-----------------------------------------------------------------------
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# Phony Targets
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#-----------------------------------------------------------------------
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# A phony target. Any target that isn't a file.
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# It will never be up to date so make will always try to run it.
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all: faker process
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# We can declare things out of order.
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maker:
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touch ex0.txt ex1.txt
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# Can avoid phony rules breaking when a real file has the same name by
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.PHONY: all maker process
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# This is a special target. There are several others.
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# A rule with a dependency on a phony target will always run
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ex0.txt ex1.txt: maker
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# Common phony targets are: all make clean install ...
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#-----------------------------------------------------------------------
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# Automatic Variables & Wildcards
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#-----------------------------------------------------------------------
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process: file*.txt #using a wildcard to match filenames
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@echo $^ # $^ is a variable containing the list of prerequisites
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@echo $@ # prints the target name
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#(for multiple target rules, $@ is whichever caused the rule to run)
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@echo $< # the first prerequisite listed
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@echo $? # only the dependencies that are out of date
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@echo $+ # all dependencies including duplicates (unlike normal)
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#@echo $| # all of the 'order only' prerequisites
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# Even if we split up the rule dependency definitions, $^ will find them
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process: ex1.txt file0.txt
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# ex1.txt will be found but file0.txt will be deduplicated.
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#-----------------------------------------------------------------------
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# Patterns
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#-----------------------------------------------------------------------
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# Can teach make how to convert certain files into other files.
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%.png: %.svg
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inkscape --export-png %.svg
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# Pattern rules will only do anything if make decides to create the \
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target.
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# Directory paths are normally ignored when matching pattern rules. But
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# make will try to use the most appropriate rule available.
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small/%.png: %.svg
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inkscape --export-png --export-dpi 30 %.svg
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# make will use the last version for a pattern rule that it finds.
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%.png: %.svg
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@echo this rule is chosen
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# however make will use the first pattern rule that can make the target
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%.png: %.ps
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@echo this rule is not chosen if %.svg and %.ps are both present
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# make already has some pattern rules built-in. For instance, it knows
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# how to turn *.c files into *.o files.
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#-----------------------------------------------------------------------
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# Variables
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#-----------------------------------------------------------------------
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# aka. macros
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# Variables are basically all string types
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name = Ted
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name2="Sarah"
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echo:
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@echo $(name)
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@echo ${name2}
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@echo $name # This won't work, treated as $(n)ame.
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@echo $(name3) # Unknown variables are treated as empty strings.
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# There are 4 places to set variables.
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# In order of priority from highest to lowest:
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# 1: commandline arguments
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# 2: Makefile
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# 3: shell enviroment variables - make imports these automatically.
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# 4: make has some predefined variables
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name4 ?= Jean
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# Only set the variable if enviroment variable is not already defined.
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override name5 = David
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# Stops commandline arguments from changing this variable.
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name4 +=grey
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# Append values to variable (includes a space).
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# Pattern-specific variable values (GNU extension).
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echo: name2 = Sara # True within the matching rule
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# and also within it's remade recursive dependencies
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# (except it can break when your graph gets too complicated!)
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# Some variables defined automatically by make.
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echo_inbuilt:
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echo $(CC)
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echo ${CXX)}
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echo $(FC)
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echo ${CFLAGS)}
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echo $(CPPFLAGS)
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echo ${CXXFLAGS}
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echo $(LDFLAGS)
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echo ${LDLIBS}
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#-----------------------------------------------------------------------
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# Variables 2
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#-----------------------------------------------------------------------
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# The first type of variables are evaluated each time they are used.
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# This can be expensive, so a second type of variable exists which is
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# only evaluated once. (This is a GNU make extension)
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var := hello
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var2 ::= $(var) hello
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#:= and ::= are equivalent.
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# These variables are evaluated procedurely (in the order that they
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# appear), thus breaking with the rest of the language !
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# This doesn't work
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var3 ::= $(var4) and good luck
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var4 ::= good night
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#-----------------------------------------------------------------------
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# Functions
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#-----------------------------------------------------------------------
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# make has lots of functions available.
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sourcefiles = $(wildcard *.c */*.c)
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objectfiles = $(patsubst %.c,%.o,$(sourcefiles))
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# Format is $(func arg0,arg1,arg2...)
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# Some examples
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ls: * src/*
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@echo $(filter %.txt, $^)
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@echo $(notdir $^)
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@echo $(join $(dir $^),$(notdir $^))
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#-----------------------------------------------------------------------
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# Directives
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#-----------------------------------------------------------------------
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# Include other makefiles, useful for platform specific code
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include foo.mk
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sport = tennis
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# Conditional compilation
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report:
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ifeq ($(sport),tennis)
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@echo 'game, set, match'
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else
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@echo 'They think it's all over; it is now'
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endif
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# There are also ifneq, ifdef, ifndef
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foo = true
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ifdef $(foo)
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bar = 'hello'
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endif
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```
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### More Resources
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[gnu make documentation](https://www.gnu.org/software/make/manual/)
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[software carpentry tutorial](http://swcarpentry.github.io/make-novice/)
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learn C the hard way [ex2](http://c.learncodethehardway.org/book/ex2.html) [ex28](http://c.learncodethehardway.org/book/ex28.html)
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